Display panels such as liquid crystal displays (LCDs) and active matrix organic light-emitting diode (AMOLED) displays are extensively applied in various electronic devices. A great number of PMOS thin film transistors exist in a backplane of the display panel, and low-temperature polysilicon (LTPS) technology is popular due to advantages of the resultant thin film circuit such as a small thickness, a small area and low power consumption. However, the PMOS thin film transistor generally has a large leakage current, which is unfavorable to the performance of the LCD or AMOLED display. In particular, since the thin film transistors in the pixel circuit of the AMOLED display panel are usually PMOS TFTs, the leakage current of the PMOS TFT has a larger impact on the performance of the AMOLED display panel. For example, the leakage current may cause occurrence of bright spots and light leakage when it exceeds a certain value.
At present, the leakage current of the PMOS thin film transistor may generally be reduced by improving the structure of the thin film transistor, for example, by employing a dual-gate TFT, reducing a channel width of the TFT, or increasing a channel length of the TFT. However, employing the dual-gate TFT or increasing the channel length of the TFT increases the size of the TFT, and the TFT can only allow for a small reduction in the channel width due to limitations of the size of the silicon crystal (especially the low-temperature polysilicon (LTPS)). In one word, these methods are not conducive to design-flexibility and integration of the thin film transistors, and especially cannot easily be adapted to the complicated pixel circuit in the AMOLED display panel.
Therefore, there is a need for an improved method of reducing the leakage current of the PMOS TFT and a method of reducing the leakage current of at least one PMOS thin film transistor in an application circuit, especially in an AMOLED pixel circuit.